g eneral d escription the is n - channel mos field effect transistor designed for high current switching applications. rugged e as capability and ultra low r ds(on) is suitable for pwm, load sw itching especially for e - bike controller applications. features v ds =70v i d =87a@ v gs = 10 v r ds(on) <5.8m @ v gs = 10 v special d esigned for e - bike c ontroller application u ltra l ow on - resistance h igh uis and uis 100% t est application 48v e - bike c ontroller a pplications hard switched and high frequency circuits unint erruptible power supply table 1. a bsolute maximum r atings (ta=25 ) symbol parameter value unit v ds drain - source voltage ( v gs= 0v 70 v v gs gate - source voltage ( v ds= 0v) 25 v i d (dc) drain current (dc) at tc=25 87 a i d (dc) drain current (dc) at tc=100 60.9 a i dm (pluse) drain current - continuous@ current - pulsed (note 1 ) 348 a dv/dt peak d iode r ecovery v oltage 30 v /n s p d maximum power dissipation (tc=25 ) 111 w derating factor 0.74 w/ e as single p ulse a valanche e nergy (note 2 ) 5 52 mj t j ,t stg operating junction and storage temperature range - 55 to 175 note s 1. repetitive rating: pulse width limited by maximum junction temperature 2. e as condition: t j =25 ,v dd =33v,v g =10v,i d =48 a schematic diagram v dss = 70v i dss = 87a r d s(on) = 5.5m ? ? CS48N80 pb free plating product CS48N80 pb 70v,87a n-channel trench process power mosfet g d s CS48N80 (to-220 heatsink) ? 2006 thinki semiconductor co.,ltd. http://www.thinkisemi.com/ page 1/5 rev.05 CS48N80
table 2. t hermal characteristic symbol parameter value unit r ? jc thermal resistance,junction - to - case 1.35 / w table 3. e lectrical characteristics (ta=25 unless otherwi se noted) symbol parameter condition s min typ max unit on/off states bv dss drain - source breakdown voltage v gs =0v i d =250a 70 v i dss zero gate voltage drain current (tc=25 ) v ds = 68 v,v gs =0v 1 a i dss zero gate voltage drain current (tc=125 ) v ds = 68 v,v gs =0v 10 a i gss gate - body leakage current v gs = 25 v,v ds =0v 100 na v gs(th) gate threshold voltage v ds =v gs ,i d =250a 2 4 v r ds(on) drain - source on - state resistance v gs = 10 v, i d =4 0 a 5.5 5.8 m dynamic characteristics g fs forward transconducta nce v ds = 10 v,i d = 40 a 28 s c iss input capacitance 3200 p f c oss output capacitance 3 50 p f c rss reverse transfer capacitance v ds = 25 v,v gs =0v, f =1.0mhz 32 0 p f q g total gate charge 76.1 nc q gs gate - source charge 14.9 nc q gd gate - drain charge v ds = 50 v,i d = 40 a, v gs = 10 v 31.6 nc s witching t imes t d(on) turn - on delay time 12 ns t r turn - on rise time 14 ns t d(off) turn - off delay time 25 ns t f turn - off fall time v dd = 3 0v,i d = 2 a ,r l =15 v gs = 10 v,r g = 2.5 30 ns source - d rain d iode characteristics i sd source - drain current(body diode) 87 a i sdm pulsed source - drain current(body dio de) 348 a v sd forward on voltage (note 1 ) t j =25 ,i sd =40a,v gs =0v 0.8 0.95 v t rr reverse recovery time (note 1 ) 45 ns q rr reverse recovery charge (note 1 ) t j =25 ,i f =75a di/dt=100a/ s 90 nc t on forward turn - on time intrinsic turn - on time is negligib le(turn - on is dominated by l s +l d ) note s 1 . pulse test: pulse width 300s, duty cycle 1.5 % , r g =25 , starting t j =25 ? 2006 thinki semiconductor co.,ltd. http://www.thinkisemi.com/ page 2/5 rev.05 ? CS48N80
test c i r c uit 1 e a s t e s t circuits 2 gate ch a rge t est cir c uit: 3 s w itch time test circui t ? 2006 thinki semiconductor co.,ltd. http://www.thinkisemi.com/ page 3/5 rev.05 ? CS48N80
typical electrical and t h ermal charac t eristics (curves) figure1. safe operating area figure2. source - drain diode forward voltage figure3. output c haracteristics figure4. transfer characteristics i s - source current (a) i d (a) v ds (volts) i d (a) v ds (volts) r ds(on) (m ) i d (a ) figure5. static d rain - s ource o n r esistance figure6. r ds(on) vs junction tempe rature i d (a) v gs (volts) r ds(on) t c = 2 5 10us 1ms 10ms dc ? 2006 thinki semiconductor co.,ltd. http://www.thinkisemi.com/ page 4/5 rev.05 ? CS48N80
figure7. b v dss vs junction temperature figure8. v gs(th) vs junction temperature temperature temperature figure9. gate c harge w aveforms figure10. capacitance figure11. normalized maximum transient thermal impedance square w ave pluse dur a tion(sec) r (t), normalized effective transient thermal impedance qg gate charge (nc) v gs (volts) ? 2006 thinki semiconductor co.,ltd. http://www.thinkisemi.com/ page 5/5 rev.05 ? CS48N80
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